Hi! I am currently a Ph.D. student at Northeastern University, advised by Prof. Xue (Shelley) Lin and Prof. Yanzhi Wang, starting from Fall 2020. My research interests include algorithm/hardware co-design, FPGAs, and electronic design automation.

Previously, I received my B.E. degree in microelectronic science and engineering from Fudan University, in 2020. During my undergrad, I was fortunate to work with Prof. Jianli Chen.

Publications

[W1] SuperFlow: An RTL-to-GDS Design Automation Flow for AQFP Superconducting Devices
Yanyue Xie, Peiyan Dong, Geng Yuan, Zhengang Li, Chao Wu, Sung-En Chang, Xufeng Zhang, Olivia Chen, Nobuyuki Yoshikawa, and Yanzhi Wang
2023 60th ACM/IEEE Design Automation Conference (DAC 2023)

[C8] ESRU: Extremely Low-Bit and Hardware-Efficient Stochastic Rounding Unit Design for 8-Bit DNN Training
Sung-En Chang, Geng Yuan, Alec Lu, Mengshu Sun, Yanyu Li, Xiaolong Ma, Zhengang Li, Yanyue Xie, Minghai Qin, Xue Lin, Zhenman Fang, and Yanzhi Wang
2023 Design, Automation & Test in Europe Conference & Exhibition (DATE 2023)

[C7] Peeling the Onion: Hierarchical Reduction of Data Redundancy for Efficient Vision Transformer Training
Zhenglun Kong, Haoyu Ma, Geng Yuan, Mengshu Sun, Yanyue Xie, Peiyan Dong, Xin Meng, Xuan Shen, Hao Tang, Minghai Qin, Tianlong Chen, Xiaolong Ma, Xiaohui Xie, Zhangyang Wang, and Yanzhi Wang
37th AAAI Conference on Artificial Intelligence (AAAI 2023)

[C6] HeatViT: Hardware-efficient adaptive token pruning for vision transformers
Peiyan Dong, Mengshu Sun, Alec Lu, Yanyue Xie, Kenneth Liu, Zhenglun Kong, Xin Meng, Zhengang Li, Xue Lin, Zhenman Fang, and Yanzhi Wang
29th IEEE International Symposium on High-Performance Computer Architecture (HPCA 2023)

[C5] You Already Have It: A Generator-Free Low-Precision DNN Training Framework using Stochastic Rounding
Geng Yuan, Sung-En Chang, Qing Jin, Alec Lu, Yanyu Li, Yushu Wu, Zhenglun Kong, Yanyue Xie, Peiyan Dong, Minghai Qin, Xiaolong Ma, Xulong Tang, Zhenman Fang, and Yanzhi Wang
European Conference on Computer Vision (ECCV 2022)

[C4] Auto-ViT-Acc: An FPGA-Aware Automatic Acceleration Framework for Vision Transformer with Mixed-Scheme Quantization
Zhengang Li, Mengshu Sun, Alec Lu, Haoyu Ma, Geng Yuan, Yanyue Xie, Hao Tang, Yanyu Li, Miriam Leeser, Zhangyang Wang, Xue Lin, and Zhenman Fang
2022 32nd International Conference on Field-Programmable Logic and Applications (FPL 2022)

[C3] TAAS: A Timing-Aware Analytical Strategy for AQFP-Capable Placement Automation
Peiyan Dong, Yanyue Xie, Hongjia Li, Mengshu Sun, Olivia Chen, Nobuyuki Yoshikawa, and Yanzhi Wang
2022 59th ACM/IEEE Design Automation Conference (DAC 2022)

[C2] Timing-Driven Placement for FPGAs with Heterogeneous Architectures and Clock Constraints
Zhifeng Lin, Yanyue Xie, Gang Qian, Jianli Chen, Sifei Wang, Jun Yu, and Yao-Wen Chang
2021 Design, Automation & Test in Europe Conference & Exhibition (DATE 2021)

[C1] Late Breaking Results: An Analytical Timing-Driven Placer for Heterogeneous FPGAs
Zhifeng Lin, Yanyue Xie, Gang Qian, Sifei Wang, Jun Yu, and Jianli Chen
2020 57th ACM/IEEE Design Automation Conference (DAC 2020)

[J2] Mixed-Cell-Height Placement with Complex Minimum-Implant-Area Constraints
Jianli Chen, Zhifeng Lin, Yanyue Xie, Wenxing Zhu, and Yao-Wen Chang
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD 2022)

[J1] An Incremental Placement Flow for Advanced FPGAs with Timing Awareness
Zhifeng Lin, Yanyue Xie, Peng Zou, Sifei Wang, Jun Yu, and Jianli Chen
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD 2022)

Awards

DAC Young Fellow, Design Automation Conference, 2021
First Prize Scholarship, Fudan University, 2020